1. Field of the Invention
The present invention relates to a method of grinding the rear surface of a wafer such as a semiconductor wafer to reduce the thickness of the wafer. In particular, the invention relates to a technique for grinding only an area of a wafer corresponding to an area formed with a device on its surface so as to form a cross-sectionally recessed portion in the wafer.
2. Description of the Related Art
Semiconductor chips used for various electronics are generally manufactured by the following method. The front surface of a disklike semiconductor wafer is sectioned into lattice-like rectangular areas by predetermined dividing lines. Electronic circuits such as IC, LSI and the like are formed on the front surfaces of such rectangular areas. The rear surface of the wafer is ground to thin the entire wafer and the wafer is then divided into the semiconductor chips along the predetermined dividing lines. The thinning by the rear surface grinding is performed by a method in which a semiconductor wafer is sucked and held on a vacuum chuck type chuck table with the rear surface to be ground exposed and rotating grindstones are pressed against the rear surface of the semiconductor wafer.
Incidentally, electronics have significantly been downsized and thinned in recent years and along with this also thinner semiconductor chips are required. This causes the necessity that semiconductor wafer should be thinner than conventional one. However, thinning the semiconductor wafer reduces its rigidity, which poses a problem in that handling after the thinning process becomes difficult and the wafer is likely to crack. To eliminate the problem, only a circular device area formed with semiconductor chips are ground from the rear surface side thereof to thin the wafer. In addition, an annular outer circumferential redundant area around the device area is left to have an original thickness and to form an annular protruding portion protruding toward the rear surface side. Thus, the entire wafer is processed to form a portion recessed in cross-section on the rear surface thereof. See Japanese Patent Laid-open Nos. 2004-281551 and 2005-123425. Such a semiconductor wafer is easy to handle and unlikely to crack since the annular protruding portion serves as a reinforcing portion to ensure rigidity.
Grinding processing for forming a recessed portion on the rear surface of a wafer may be performed by using a high-mesh grindstone containing abrasive grains of #2000 or more for finishing grinding. Such a case provides the following advantages: A mechanical damage layer lowering transverse rupture strength on the to-be-ground surface or a recessed portion inner surface can be suppressed to a low level. In addition, since the inner circumferential lateral surface of the annular protruding portion is ground concurrently with the bottom surface of the recessed portion, only one grinding process is required. FIG. 10A illustrates such a method of forming the recessed portion at an area of the rear surface corresponding to the device formation area. In this case, the rear surface (the upper surface in the figure) of the wafer 1 is ground by a finishing grindstone 101 secured to a grinding wheel 100 rotating at a high speed to form a recessed portion 1A and an annular protruding portion 5A protruding on the rear surface side around the device formation area. However, this method performs the grinding with the finishing grindstone 101 from the beginning; therefore, grinding performance for a grinding amount enough to form the recessed portion 1A deteriorates. This prolongs processing time to make the processing inefficient.
As illustrated, an outer circumferential side corner of the grindstone 101 is removed or rounded because of the increased grinding load, so that an inner corner portion formed between the bottom portion 4a of the recessed portion and the inner circumferential lateral surface 5B of the annular protruding portion 5A is ground in an R-shape. Because of this, the outermost circumferential portion of the device formation area indicated with symbol “NG” is not ground to a target thickness. The area of the actual device formation area is reduced to reduce the obtainable number or yield of the semiconductor chips. This problem is solved by dressing the grindstone 101 having a rounded corner to form the corner at a right angle as shown in FIG. 10B. However, the dressing is needed to consequently deteriorate productivity and shorten the operating life of the grindstone.
Then, a two-step grinding method is effective in reducing the processing time although the processes are increased. This two-step grinding method involves grinding the rear surface of a wafer with a rough grindstone containing abrasive grains of e.g. #320 to #600 to form a recessed portion and then performing finishing grinding with a finishing grindstone. However, it is difficult for this method to position a finishing grindstone at the inner circumferential lateral surface of the annular protruding portion so as to conform to the shape and dimensions of the roughly ground recessed portion. A technique has not been established in which the transverse movement of the grindstone toward the inner circumferential lateral surface while performing minute adjustment. Therefore, the finishing grinding is performed only on the bottom surface 4a of the recessed portion 1A as shown in FIG. 10C. A broken line of this figure indicates the bottom surface of the recessed portion 1A formed by the rough grinding. As described above, the finishing grinding performed only on the bottom surface 4a of the recessed portion 1A does not perform the finishing grinding on the outermost circumferential portion of the bottom surface 4a, whereby the device formation region is narrowed by the non-ground portion “NG”. Also in this case, the yield of semiconductor chips is reduced.